As is known in the art, a typical radar transceiver includes three switch filter banks, one for front end interference protection, one for receiver image rejection, and one for transmit image rejection. The switch filter banks require a significant amount of real estate and dominate the size of a single chip transceiver architecture. In conventional configurations, the switch filter banks must be placed off-chip.
FIG. 1 shows a prior art single chip radar transceiver 10 having multiple switch filter banks SFB1, SFB2, SFB2. A first switch filter hank SFB1 provides interference protection, a second switch filter bank SFB2 provides transmit image rejection for the purpose of avoiding the necessity to increase the power of the transmitter amp by 6 dB or more in order to pass both sidebands without distorting the desired sideband, and a third switch filter back SFB3 provides receive image rejection for the purpose of preventing noise figure degradation due to down conversion of the unwanted LNA image noise. As can be seen, the first, second, and third switch filter banks SFB1-3 are off chip due the space required for the filter banks. The challenges of routing signals off and then on chip for signals in the GHz ranges will be readily understood by one of ordinary skill in the art.